mimalloc/include
Jim Huang 1966db91b7 Implement appropriate atomic_yield for Armv7+
Spin-wait often involves active sleep (better known as "pause"). x86
has a direct assembly instruction named "PAUSE" which has two roles:
one is to hint at the operating systme that it might be ready to be
swapped out, and the other is to create a small delay. That delay is
useful as backoff from attempting to capture spinlocks, which improves
the behavior of the system and allows more efficient lock acquisition.

However, the "yield" instruction is not a good fit because it is
effectively a nop on most Arm cores and does not cause enough delay to
help backoff. The "isb" instruction is a barrier that, especially
inside a loop, creates a small delay without consuming ALU resources.
2021-04-23 22:42:58 +00:00
..
mimalloc-atomic.h Implement appropriate atomic_yield for Armv7+ 2021-04-23 22:42:58 +00:00
mimalloc-internal.h Merge pull request #384 from kdrag0n/fix-android-thread-id 2021-04-22 10:33:53 -07:00
mimalloc-new-delete.h fix noexcept attribute on array delete operators 2020-02-02 22:04:53 -08:00
mimalloc-override.h Fix strndup override 2020-12-13 01:50:31 -05:00
mimalloc-types.h Fix typo in comment 2021-04-17 15:08:25 -03:00
mimalloc.h bump version to 1.7.1 2021-04-06 10:56:26 -07:00