Jim Huang
1966db91b7
Implement appropriate atomic_yield for Armv7+
...
Spin-wait often involves active sleep (better known as "pause"). x86
has a direct assembly instruction named "PAUSE" which has two roles:
one is to hint at the operating systme that it might be ready to be
swapped out, and the other is to create a small delay. That delay is
useful as backoff from attempting to capture spinlocks, which improves
the behavior of the system and allows more efficient lock acquisition.
However, the "yield" instruction is not a good fit because it is
effectively a nop on most Arm cores and does not cause enough delay to
help backoff. The "isb" instruction is a barrier that, especially
inside a loop, creates a small delay without consuming ALU resources.
2021-04-23 22:42:58 +00:00
Daan Leijen
71ac98ab08
rename <Windows.h> include to <windows.h> for mingw compatibility (see pr #367 )
2021-02-22 13:04:11 -08:00
Daan Leijen
8d4444ef00
remove spurious parenthesis ( #350 )
2021-01-28 17:36:35 -08:00
Michael R. Crusoe
fb66ebea1d
add/improve atomic yields for SSE2, ARM*, PowerPC
2021-01-23 16:45:47 +01:00
David Carlier
33a10b4860
Restricts cpu yield instructions a little.
...
adding clobber for ARM and preventing older 32 bits chips not supporting this instruction.
2020-12-12 12:19:04 +00:00
daan
4355ab7d20
add i64 atomics
2020-09-06 13:21:02 -07:00
daan
83bd352f37
roll back previous commit (use standard C++ atomics on msvc
2020-09-05 11:29:38 -07:00
daan
102a85937e
experiment with using non-c++ atomics on msvc
2020-09-05 11:27:06 -07:00
daan
2e311f341b
fix msvc compilation in C mode
2020-09-05 09:37:09 -07:00
daan
50de0d2358
fix C++ compilation with new atomics
2020-09-05 09:17:42 -07:00
daan
900c97664a
merge from dev-atomic
2020-09-03 09:47:01 -07:00
daan
76a68cd7af
bump version to 1.6.6 with new atomics
2020-09-03 09:45:53 -07:00
daan
b4825372ab
small compilation warning fixes (extra semicolon etc)
2020-08-29 19:30:38 -07:00
daan
5805c39916
enable --std=c99 compilation; fix mingw compilation
2020-08-09 17:55:17 -07:00
daan
ef8e5d18a6
replace atomics with C11/C++ atomics with explicit memory order; passes tsan. Issue #130
2020-07-26 18:01:33 -07:00
daan
a468430772
strengthen memory order of bit operations; insert memory fences
2020-07-26 14:19:30 -07:00
daan
a9f46dc86f
reduce memory order constraints for better efficiency on ARM etc
2020-07-26 11:58:02 -07:00
daan
ebf951e851
extra checks for atomic ptr exchange; extend mi_atomic_yield for win32
2020-07-26 00:15:57 -07:00
daan
09ade02429
bring inline with C11 atomics; no volatile and cas order of expected/desired
2020-07-25 22:52:27 -07:00
daan
e27422adca
switch to using C++ atomics in MSVC as well
2020-07-25 20:55:45 -07:00
daan
a9a21f39d8
fix memory order for CAS failure, issue #130
2020-07-23 15:52:02 -07:00
daan
b74caddcc1
fix memory order to acq_rel for atomic and/or, issue #130 , thanks @mpoeter!
2020-07-23 15:00:49 -07:00
daan
8aa18d3661
fix TSAN warning for statistics maximum, issue #130
2020-07-22 14:16:18 -07:00
daan
444afa934f
fix memory order for weak CAS, issue #130 , thanks @mary3000!
2020-07-22 13:58:00 -07:00
daan
2e1b4f512d
make max update in the stats atomic
2020-07-22 13:45:04 -07:00
daan
e3b16fe4ef
reduce type casts in atomic operations
2020-01-22 19:44:54 -08:00
daan
9d7ac76d93
fix compilation under Intel C compiler (icc)
2020-01-19 18:35:45 -08:00
daan
17ade3fca5
merge from dev
2019-11-13 17:52:20 -08:00
Marco Wang
29919a938d
Avoid the use of variable argument list function
2019-11-13 13:19:21 +08:00
daan
00e19cad9a
refactor region code, split out atomic bitmap
2019-11-06 21:37:23 -08:00
daan
fdfa6ed260
fix warnings at high warning level in msvc
2019-10-17 16:56:57 -07:00
daan
f0a12699c2
remove atomic_iread
2019-08-26 12:42:25 -07:00
daan
a654732d99
merge from dev new atomics
2019-08-26 12:30:03 -07:00
daan
7ce9c02fd4
make cas weak use release memory order; improve free assembly
2019-08-26 08:20:26 -07:00
daan
5c7c106d62
strengthen some atomic operations for weak memory models
2019-08-26 08:11:58 -07:00
daan
e8664001f7
Use standard _Atomic declarations and clean up atomic operations
2019-08-25 22:59:12 -07:00
daan
42dedb00ec
initial implementation of mi_os_reserve_huge_pages
2019-08-19 11:10:06 -07:00
daan
72d8608333
avoid thread over-allocation on initial region allocations
2019-07-15 17:35:43 -07:00
Frank Denis
9129ab0f64
Port to WebAssembly
2019-07-15 02:22:41 +02:00
daan
35b590de21
Merge branch 'dev' into dev-exp
2019-07-09 15:12:18 -07:00
daan
8ef37e6c0b
update atomic exchange memory model annotations for unix
2019-07-09 14:56:43 -07:00
daan
493dfc4b82
merge with dev
2019-07-08 15:42:42 -07:00
daan
7f0137a617
Fix compilation error with MSVC C++
2019-07-07 21:59:53 -07:00
daan
06bcea1761
Initial commit of separate memory region layer and improved large OS pages support, see 'memory.c'
2019-07-02 07:23:24 -07:00
Julian Fang
c19d3a27a8
Remove underscore prefixes to match c lanuguage standard
2019-06-26 12:57:13 +08:00
Frank Denis
236cd2e65c
fn() is not a valid C prototype
2019-06-25 12:16:36 +02:00
daan
a16d95375f
remove lock code from atomics (as it is unused)
2019-06-24 17:54:41 -07:00
Daan
fab7329c7a
Merge pull request #24 from jserv/clarify-license
...
Clarify top-level license file
2019-06-23 10:47:38 -07:00
Jim Huang
b1d299b35b
Clarify top-level license file
...
To be consistent with other Microsoft open source projects, each source
file points to the file "LICENSE" in top-level directory.
2019-06-23 19:53:34 +08:00
Jim Huang
77991fccee
Implement ARM/Aarch64 atomic_yield fastpath
2019-06-23 16:53:49 +08:00