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fix 32-bit compile warnings

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daanx 2023-04-17 12:01:00 -07:00 • committed by Daan Leijen
parent e03f26b035
commit 63ddc31d3f
2 changed files with 24 additions and 7 deletions
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17
include/mimalloc/atomic.h
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@ -118,6 +118,8 @@ static inline void mi_atomic_maxi64_relaxed(volatile int64_t* p, int64_t x) {
#define mi_atomic_storei64_release(p,x) mi_atomic(store_explicit)(p,x,mi_memory_order(release)) #define mi_atomic_storei64_release(p,x) mi_atomic(store_explicit)(p,x,mi_memory_order(release))
#define mi_atomic_storei64_relaxed(p,x) mi_atomic(store_explicit)(p,x,mi_memory_order(relaxed)) #define mi_atomic_storei64_relaxed(p,x) mi_atomic(store_explicit)(p,x,mi_memory_order(relaxed))
#define mi_atomic_casi64_strong_acq_rel(p,e,d) mi_atomic_cas_strong_acq_rel(p,e,d)
#define mi_atomic_addi64_acq_rel(p,i) mi_atomic_add_acq_rel(p,i)
#elif defined(_MSC_VER) #elif defined(_MSC_VER)
@ -245,6 +247,21 @@ static inline void mi_atomic_maxi64_relaxed(volatile _Atomic(int64_t)*p, int64_t
} while (current < x && _InterlockedCompareExchange64(p, x, current) != current); } while (current < x && _InterlockedCompareExchange64(p, x, current) != current);
} }
static inline void mi_atomic_addi64_acq_rel(volatile _Atomic(int64_t*)p, int64_t i) {
mi_atomic_addi64_relaxed(p, i);
}
static inline bool mi_atomic_casi64_strong_acq_rel(volatile _Atomic(int64_t*)p, int64_t* exp, int64_t des) {
int64_t read = _InterlockedCompareExchange64(p, des, *exp);
if (read == *exp) {
return true;
}
else {
*exp = read;
return false;
}
}
// The pointer macros cast to `uintptr_t`. // The pointer macros cast to `uintptr_t`.
#define mi_atomic_load_ptr_acquire(tp,p) (tp*)mi_atomic_load_acquire((_Atomic(uintptr_t)*)(p)) #define mi_atomic_load_ptr_acquire(tp,p) (tp*)mi_atomic_load_acquire((_Atomic(uintptr_t)*)(p))
#define mi_atomic_load_ptr_relaxed(tp,p) (tp*)mi_atomic_load_relaxed((_Atomic(uintptr_t)*)(p)) #define mi_atomic_load_ptr_relaxed(tp,p) (tp*)mi_atomic_load_relaxed((_Atomic(uintptr_t)*)(p))

6
src/arena.c
View file

@ -506,7 +506,7 @@ static void mi_arena_schedule_purge(mi_arena_t* arena, size_t bitmap_idx, size_t
// schedule decommit // schedule decommit
mi_msecs_t expire = mi_atomic_loadi64_relaxed(&arena->purge_expire); mi_msecs_t expire = mi_atomic_loadi64_relaxed(&arena->purge_expire);
if (expire != 0) { if (expire != 0) {
mi_atomic_add_acq_rel(&arena->purge_expire, delay/10); // add smallish extra delay mi_atomic_addi64_acq_rel(&arena->purge_expire, delay/10); // add smallish extra delay
} }
else { else {
mi_atomic_storei64_release(&arena->purge_expire, _mi_clock_now() + delay); mi_atomic_storei64_release(&arena->purge_expire, _mi_clock_now() + delay);
@ -547,7 +547,7 @@ static bool mi_arena_try_purge(mi_arena_t* arena, mi_msecs_t now, bool force, mi
if (!force && expire > now) return false; if (!force && expire > now) return false;
// reset expire (if not already set concurrently) // reset expire (if not already set concurrently)
mi_atomic_cas_strong_acq_rel(&arena->purge_expire, &expire, 0); mi_atomic_casi64_strong_acq_rel(&arena->purge_expire, &expire, 0);
// potential purges scheduled, walk through the bitmap // potential purges scheduled, walk through the bitmap
bool any_purged = false; bool any_purged = false;
@ -589,7 +589,7 @@ static bool mi_arena_try_purge(mi_arena_t* arena, mi_msecs_t now, bool force, mi
if (!full_purge) { if (!full_purge) {
const long delay = mi_option_get(mi_option_purge_delay) * mi_option_get(mi_option_arena_purge_mult); const long delay = mi_option_get(mi_option_purge_delay) * mi_option_get(mi_option_arena_purge_mult);
mi_msecs_t expected = 0; mi_msecs_t expected = 0;
mi_atomic_cas_strong_acq_rel(&arena->purge_expire,&expected,_mi_clock_now() + delay); mi_atomic_casi64_strong_acq_rel(&arena->purge_expire,&expected,_mi_clock_now() + delay);
} }
return any_purged; return any_purged;
} }