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prim.h: support tls_slot for PPC

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barracuda156 2023-07-07 16:32:03 +08:00
parent 36ee5f9024
commit 17520fbf03
1 changed files with 7 additions and 1 deletions
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8
include/mimalloc/prim.h
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@ -146,7 +146,7 @@ static inline mi_threadid_t _mi_prim_thread_id(void) mi_attr_noexcept {
// see also https://akkadia.org/drepper/tls.pdf for more info on the TLS register.
#elif defined(__GNUC__) && ( \
(defined(__GLIBC__) && (defined(__x86_64__) || defined(__i386__) || defined(__arm__) || defined(__aarch64__))) \
|| (defined(__APPLE__) && (defined(__x86_64__) || defined(__aarch64__))) \
|| (defined(__APPLE__) && (defined(__x86_64__) || defined(__aarch64__) || defined(__POWERPC__))) \
|| (defined(__BIONIC__) && (defined(__x86_64__) || defined(__i386__) || defined(__arm__) || defined(__aarch64__))) \
|| (defined(__FreeBSD__) && (defined(__x86_64__) || defined(__i386__) || defined(__aarch64__))) \
|| (defined(__OpenBSD__) && (defined(__x86_64__) || defined(__i386__) || defined(__aarch64__))) \
@ -175,6 +175,9 @@ static inline void* mi_prim_tls_slot(size_t slot) mi_attr_noexcept {
__asm__ volatile ("mrs %0, tpidr_el0" : "=r" (tcb));
#endif
res = tcb[slot];
#elif defined(__POWERPC__)
MI_UNUSED(ofs);
res = pthread_getspecific(slot);
#endif
return res;
}
@ -202,6 +205,9 @@ static inline void mi_prim_tls_slot_set(size_t slot, void* value) mi_attr_noexce
__asm__ volatile ("mrs %0, tpidr_el0" : "=r" (tcb));
#endif
tcb[slot] = value;
#elif defined(__POWERPC__)
int res; MI_UNUSED(ofs);
res = pthread_setspecific(slot, value);
#endif
}